National Instruments - DP8400

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Contents

The DP8400 Family of Memory Interface Circuits INTRODUCTION The rapid development in dynamic random access memory DRAM chip storage capability coupled with significant component cost reductions has allowed designers to build large memory arrays with high performance specifications However the development of memory arrays continues to have a common set of problems generated by the complex timing and refresh requirements of DRAMs These include how to quickly drive the memories to take advantage of their speed minimization of board space required by the support circuitry and the need for error detection and correction Unfortunately these problems must be addressed with each new system design Full system solutions will vary greatly depending on the DRAM arra ...